Course Content
Digital Fundamentals
0/11
Number Systems
00:00
Decimal Number System
Binary Number (Base 2 Number System)
Octet Number System (Base 8 Number System)
Hexa Decimal Number system (Base 16 Number System)
Boolean theorems
Logic gates
Sum of products and product of sums
Minterms and Maxterms
Karnaugh map Minimization
Quine-McCluskey method of minimization
Combinational Circuit Design
0/10
Design of Half and Full Adders
Design of Half and Full Subtractors
Binary Parallel Adder
Carry look ahead Adder
BCD Adder
Multiplexer
Demultiplexer
Magnitude Comparator
Decoder, Encoder
Priority Encoder
Synchronous Sequential Circuits
0/9
Flip flops — SR, JK, T, D
Master/Slave FF
Triggering of Flip Flop
Analysis and design of clocked sequential circuits
Design of Counters
Ripple Counters
Ring Counters
Shift registers
Universal Shift Register
Asynchronous Sequential Circuits
0/5
cycles and races
Hazards
Essential Hazards
Pulse mode sequential circuits
Design of Hazard free circuits
Memory Devices and Digital Integrated Circuits
0/10
Basic memory structure — ROM -PROM — EPROM — EEPROM –EAPROM, RAM
Static and dynamic RAM
Programmable Logic Devices
Programmable Logic Array (PLA)
Programmable Array Logic (PAL)
Field Programmable Gate Arrays (FPGA)
Implementation of combinational logic circuits using PLA
Implementation of combinational logic circuits using PAL
propagation delay
fan-out and fan-in, noise margin, logic families and their characteristics-RTL, TTL, ECL, CMOS
Digital electronics
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Design of Counters

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